|
|
Articles from
October 2004
| ARM, MIPS add DSP Extensions |
By BDTI, 10/11/2004
This month both ARM and MIPS announced new signal-processing-oriented
instruction set extensions for their future processor lineups.
Both sets of extensions add single-instruction multiple-data (SIMD)
operations that will greatly expand the signal processing capabilities
of the two processor families.
(More)
|
|
|
| |
| CEVA Announces Software-Based Multimedia Acceleration |
By BDTI, 10/11/2004
This month DSP core licensor CEVA announced an unusual multimedia
acceleration technology called MediaMagic. Instead of using
specialized hardware accelerators, MediaMagic improves multimedia
performance using a software technique CEVA calls a“pattern recognition engine.”
When using the MediaMagic pattern recognition engine, CEVA claims its
CEVA-Teak and CEVA-X1620 cores are competitive with hardwired solutions
in terms of performance and energy efficiency.
(More)
|
|
|
| |
| Designing a Processor for DSP |
By BDTI, 10/11/2004
As digital signal processing finds its way into an ever-broader range
of applications, processors that were not designed with
signal-processing applications in mind are often called upon to perform
substantial signal-processing tasks. At the same time, DSP processors
are taking on new types of tasks—for example, processors designed for
audio applications often must handle video as well. Often, the best way
for a processor vendor to meet these expanding, evolving signal
processing requirements is to design a new processor.
(More)
|
|
|
| |
| Jeff Bier's Impulse Response – Turning the Tables |
By Jeff Bier, 10/11/2004
At September's Intel Developer Forum, Intel President and COO Paul Otellini gave a keynote speech that lacked the usual obsession with clock speed. Instead, Mr. Otellini's speech focused on issues like parallelism, integration, and power consumption. What struck me about this change in emphasis is that Intel now seems to be reading from an embedded processor vendor's playbook.
(More)
|
|
|
| |
|